2018 IEEE International Electron Devices Meeting

Welcome to the Editor Press Center. The following press materials may be downloaded from this site for pre-conference publicity for the 2018 IEDM.
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Contact Info
Conference Location

Welcome to the Editor Press Center. Check back periodically for photo and caption updates. The following press materials may be downloaded from this site for pre-conference publicity for the IEDM:

2018 IEDM Press Releases:

2018 IEDM Photos with captions:
Selected images from the abstracts are presented in two formats:
- Word file with images associated with a highlighted paper and the caption
- JPEG file with individual high-resolution Images

Image With Caption
Paper 3.2, Analog Synaptic Cell Based On Ferroelectric FET for DNNs, Arizona State et al.docx
High Resolution Images
Paper 3.2 Figure 2.jpg
Paper 3.2 Figure 6.jpg

Image With Caption
Paper 4.1, Nanoelectromechanical Switches For Ultra-Low-Power Computing, UC-Berkeley.docx
High Resolution Images
Paper 4.1, Figure 1 (combined).jpg
Paper 4.1, Figure 9.jpg
Paper 4.1, Figure 10.jpg

Image With Caption
Paper 7.1, Highest-Density 3D Stacked FinFETs, Imec.docx
High Resolution Images
Paper 7.1, Figure 2.jpg
Paper 7.1, Figure 4a.jpg

Image With Caption
Paper 8.1, Superjunction SiC Device Shows Lowest On-Resistance, High Blocking Voltage, AIST.docx
High Resolution Images
Paper 8.1, Figure 1.jpg
Paper 8.1, Figure 5.jpg

Image With Caption
Paper 12.3, pH Sensor In The BEOL, STMicro et al.docx
High Resolution Images
Paper 12.3, Figure 1.jpg
Paper 12.3, Figure 2.jpg
Paper 12.3, Figure 3.jpg

Image With Caption
Paper 13.1, Electrochemical Synaptic Cell, IBM.docx
High Resolution Images
Paper 13.1, Figure 1.jpg
Paper 13.1, Figure 2.jpg
Paper 13.1, Table 1s.jpg

Image With Caption
Paper 16.1, A Sophisticated Primitive Based On Ferroelectric FETs, Univ. Notre Dame et al.docx
High Resolution Images
Paper 16.1, Figure 1.jpg
Paper 16.1, Figure 2a.jpg
Paper 16.1, Figure 2b.jpg
Paper 16.1, Figure 9.jpg
Paper 16.1, Figure 14.jpg

Image With Caption
Paper 18.1, Intel Integrates e-MRAM With 22nm FinFETs.docx
High Resolution Images
Paper 18.1, Figure 4.jpg

Image With Caption
Paper 21.1, Ge Channels For CMOS, TSMC.docx
High Resolution Images
Paper 21.1, Figure 7v2.jpg
Paper 21.1, Figure 13v1.jpg

Image With Caption
Paper 23.3, Si-Organic Electro-Optical Modulator For Low-Power Photonic ICs, IHP et al.docx
High Resolution Images
Paper 23.3, Figure1.jpg
Paper 23.3, Figure2.jpg
Paper 23.3, Figure5.jpg

Image With Caption
Paper 27.7, 8-bit Precision In-Memory Multiplication with Projected Phase-Change Memory, IBM.docx
High Resolution Images
Paper 27.7, Figure 3.jpg
Paper 27.7, Figure 13.jpg
Paper 27.7, Figure 16.jpg
Paper 27.7, Figure 1718.jpg

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Paper 31.7, Circuits Built From Negative Capacitace Fe-FinFETs, Nat'l Nano Device Labs.docx
High Resolution Images
Paper 31.7, Figure 3.jpg
Paper 31.7, Figure 17.jpg

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Paper 32.4, Ge-on-Si Lock-In Pixels for Distance Ranging, Artilux.docx
High Resolution Images
Paper 32.4, Figure 1.jpg
Paper 32.4, Figure 23.jpg

Image With Caption
Paper 34.1, Understanding Stacked GAA Nanowire Failure Modes, Imec.docx
High Resolution Images
Paper 34.1, Figure 15.jpg

Image With Caption
Paper 34.5, CMOS-Compatible Doped-Multilayer-Graphene Interconnects,UC Santa Barbara.docx
High Resolution Images
Paper 34.5, Figure 9.jpg
Paper 34.5, Figure 10.jpg

Image With Caption
Paper 37.1, Highly Integrated Self-Aligned 3D Crosspoint Storage-Class Memory, SK Hynix.docx
High Resolution Images
Paper 37.1, Figure 1.jpg
Paper 37.1, Figure 2.jpg
Paper 37.1, Figure 3.jpg

Image With Caption
Paper 39.2, InGaAs Channels For High-Mobility N-FET Nanosheets, IBM.docx
High Resolution Images
Paper 39.2, Figure 1.jpg
Paper 39.2, Figure 2.jpg

Image With Caption
Paper 40.3, A Physics-Based Analytical Model For Volatile RRAM, Politecnico di Milano.docx
High Resolution Images
Paper 40.3, Figure 1.jpg
Paper 40.3, Figure 5.jpg
Paper 40.3, Figure 18.jpg

If you plan to attend, please let us know. Also, the conference organizers are planning to have a press luncheon at the beginning of the IEDM to discuss the most interesting papers and the major technology trends evident in this year's program. We encourage journalists to attend it, and details will be provided in November.

Whether you would like to do a news story, conference preview or an in-depth exploration of a particular technology, please contact one of us for the additional information or interviews you may need.

Editor Contacts:
Gary Dagastine, co-Media Relations Director, at gdagastine@nycap.rr.com or by telephone at +1 518 785 2724
Chris Burke, co-Media Relations Director, at chris.burke@btbmarketing.com or by telephone at +1 919 872 8172

Registration/attendance questions:
Can be answered by the Conference Manager Phyllis Mahoney, at phyllism@widerkehr.com or by telephone at +1 301 527 0900.
19803 Laurel Valley Place, Montgomery Village, MD 20886 USA

IEEE International Electron Devices Meeting (IEDM) is the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electron-device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for power and energy harvesting, high-speed devices, as well as process technology and device modeling and simulation. The conference scope not only encompasses devices in silicon, compound, and organic semiconductors, but also emerging material systems.

The IEEE Electron Devices Society is dedicated to promoting excellence in the field of electron devices, and sponsors the IEDM. Learn more at ieee-iedm.org.